Guidance on technical protection measures to those who produce, use, process, or standardize the specifications of electronic design intellectual property (IP) is provided in this recommended practice. Distribution of IP creates a risk of unsanctioned use and dilution of the investment in its creation. The measures presented here include protection through encryption, specification, and management of use rights that have been granted by the producers of electronic designs, and methods for integrating license verification for granted rights. (The PDF of this standard is available at no charge compliments of it's sponsor at https://ieeexplore.ieee.org/browse/s...

This recommended practice specifies embeddable and encapsulating markup syntaxes to manage rights for the encryption and decryption of design intellectual property (IP), together with recommendations for integration with design specification formats described in IEEE Std 1800™ (SystemVerilog) and IEEE Std 1076™ (VHDL). It also recommends use models for interoperable tool and hardware flows, which will include selecting encryption and encoding algorithms, as well as encryption key management. The recommendation includes a description of the assumed trust model on which the recommended use models are based. This recommended practice does not specifically inclu...

The purpose of this document is to provide interoperability between IP authors, tool providers, integrators and users of encrypted SystemVerilog and VHDL IP. The interoperability supports licensing and management schemes to help IP authors control tool behavior. This document also makes the overall interoperability flow transparent. It addresses security concerns and enhancement requests to IEEE Std 1735-2014. This document provides guidelines and recommended practices for the use of IP protection markup syntax and key management to enable interoperable tool flows with IP and tools from a wide variety of suppliers.