This standard provides specifications for a high-speed serial bus that supports both asynchronous and isochronous communication and integrates well with most IEEE standard 32-bit and 64-bit parallel buses. It is intended to provide a low-cost interconnect between cards on the same backplane, cards on other backplanes, and external peripherals. Interfaces to longer distance transmission media [such as unshielded twisted pair (UTP), optical fiber, and plastic optical fiber (POF)] allow the interconnection to be extended throughout a local network. This standard follows the command and status register (CSR) architecture of IEEE Std 1212trade-2001.

This standard describes a high-speed, low-cost serial bus suitable for use as a peripheral bus, a backup to parallel backplane buses, or a local area network. Highlights of the serial bus include the following: a)Bus transactions that include both block and single quadlet reads and writes, as well as an “isochronous” mode that provides a low-overhead guaranteed bandwidth service. b)A fair bus access mechanism that guarantees all nodes equal access. The backplane environment adds a priority mechanism, but one that ensures that nodes using the fair protocol are still guaranteed at least partial access. c)Automatic assignment of node addresses—no need for addre...

This standard incorporates the contents of IEEE Std 1394™-1995 as revised by IEEE Std 1394a™-2000, IEEE Std 1394b™-2002, and IEEE Std 1394c™-2006. In addition, over 100 errata have been corrected, and several new features have been added per Q.12.